Field of the Invention
The present invention relates to a technique of interference check system of checking interference of three-dimensional models.
Discussion of the Background
In wiring design mainly for substrate, it is desirable that interference check is performed by a computer in a design phase, mainly with, for example, three-dimensional CAD (3 Dimension-Computer Aided Design).
In relation to such a technique, for example, techniques described in Japanese Patent Application Nos. 4641033, 4928528 and 4266783 are disclosed. Here, in the technique described in Japanese Patent Application No. 4641033, a wire harness (wiring) is firstly divided into a plurality of nodes. And, each of the nodes is located as a vertex of a triangle having a straight line connecting the constraint points (fixing tools) which constrain the wire harness as a base side, and lengths of lines on both sides of each of the nodes as two sides. Thereby, the technique described in Japanese Patent Application No. 4641033 calculates a movable range of the wire harness.
Further, the technique described in Japanese Patent Application No. 4928528 moves each node of the wire harness constrained by an actual constraint relative to the movable range of the wire harness calculated in the procedure similar to the technique described in Japanese Patent Application No. 4641033 so as to correct condition data by using a regression expression found from the measured movable range in advance obtained.
Furthermore, the technique described in Japanese Patent Application No. 4266783 deforms the wire harness so that it passes through points indicated on a screen by a user. And, the technique described in Patent Document 3 determines whether the deformed wire harness interferes with other components.